vllm.models.kimi_k3.nvidia.specialized_decode.cutedsl.dsa.attn_fi
¶
FlashInfer sparse MLA core of a K3.1 DSA layer (FLASHINFER_MLA_SPARSE): the FP8 query rows [B, H, 576] over the flat rows of the packed blocks (a per-tensor FP8 cache, or on prims_ts only an nvfp4_ds_mla one), by FlashInfer's public sparse MLA decodes, called directly with no allocation or extra kernel:
convert the top-k -> this rank's flat rows (a compacted prefix) and their counts, into the model's shared buffers on the compute stream (no index-group side stream or logical top-k event) prims_ts BatchSparseMLADecodePagedTSWrapper on the stock decode's plan of the batch (the smallest of its row capacities that holds it: the plan fixes the split-KV schedule and so the BF16 partial roundings), planned at construction; the offsets are prepared, so a step launches the decode alone trtllm-gen trtllm_batch_decode_with_kv_cache_mla (the stock workspace and multi-CTA KV counters)
Both write the latent straight into MlaValue's [B, H, 512] rows (TP) or DcpValue's [B, 128, 512] rows and [B, 128] LSE (DCP: the q mailbox is already padded to the kernel's 128 heads, so there is no head pad or unpad copy). A row this rank owns none of (count 0) needs no masking: DcpValue reads the counts and drops it, whatever its LSE (prims_ts returns -inf, trtllm-gen a finite garbage value).
The kernel is picked per (topology, rows) from FI_KERNEL among those that read
the cache (fi_kernels).
Classes:
-
FlashInferCore–One layer's FlashInfer sparse core.
impl/layer: its
Functions:
-
dsa_on_flashinfer–Whether a KimiK3DSAAttention runs FLASHINFER_MLA_SPARSE (per-tensor FP8 query;
-
fi_kernels–The sparse MLA kernels the specialized decode picks from per batch (FI_KERNEL):
-
kernel_for–The sparse MLA kernel of one batch: the measured choice among
kernels -
plan_rows_for–The rows of the prims_ts plan that runs a batch of
rows: the smallest of
FlashInferCore
¶
One layer's FlashInfer sparse core. impl / layer: its
FlashInferMLASparseImpl and attention layer; heads: the query heads per
row (the q mailbox's padded heads under DCP); buffers: the model's shared
flat rows [R, K], their counts [R], the latent [R * heads * 512] (BF16) and,
under DCP, the LSE [R * heads] (FP32); kernels: {rows: kernel}; dcp,
rank: the KV cache's DCP sharding; capacities: the stock decode's
prims_ts row capacities (plan_rows_for); widths: the index widths
decode may get (default the buffers' top-k; e.g. also the DCP top-k
merge's rows).
Methods:
-
convert–The top-k ids -> this rank's flat rows of the packed blocks (a compacted
-
decode–The sparse decode of
queryover this rank's flat rowsslotsof -
rows–The flat rows of the packed
cacheand the rows per block stride. -
run–query[B, heads, 576] (FP8 bytes) over the packedcacheat the
Source code in vllm/models/kimi_k3/nvidia/specialized_decode/cutedsl/dsa/attn_fi.py
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convert(topk, metadata, rows, stride_rows, interleave)
¶
The top-k ids -> this rank's flat rows of the packed blocks (a compacted
prefix; under DCP the global ids this rank owns, interleave tokens per
rank in turn) and their counts.
Source code in vllm/models/kimi_k3/nvidia/specialized_decode/cutedsl/dsa/attn_fi.py
decode(query, cache, slots, valid, block_size)
¶
The sparse decode of query over this rank's flat rows slots of
the packed cache (a compacted prefix of valid per row; e.g. from a
fused top-k that emits them) -> as run.
Source code in vllm/models/kimi_k3/nvidia/specialized_decode/cutedsl/dsa/attn_fi.py
rows(cache, block_size)
¶
The flat rows of the packed cache and the rows per block stride.
Source code in vllm/models/kimi_k3/nvidia/specialized_decode/cutedsl/dsa/attn_fi.py
run(query, cache, topk, metadata)
¶
query [B, heads, 576] (FP8 bytes) over the packed cache at the
top-k ids topk -> the latent [B, heads, 512] (and under DCP its LSE
[B, heads] in the kernel's base).
Source code in vllm/models/kimi_k3/nvidia/specialized_decode/cutedsl/dsa/attn_fi.py
_Plans
¶
prims_ts plans shared by every DSA layer: one per (device, rows, heads, cache
format, top-k width, LSE), each planned for its exact row count (its schedule is
the one FlashInfer picks for that many decode rows). The layers run one at a
time on one stream, so the plans of a plan call share one workspace.
Methods:
-
plan–Plan every (plan rows, heads, lse) of
shapesnot yet planned.
Source code in vllm/models/kimi_k3/nvidia/specialized_decode/cutedsl/dsa/attn_fi.py
plan(device, shapes, fmt, topk)
¶
Plan every (plan rows, heads, lse) of shapes not yet planned.
Source code in vllm/models/kimi_k3/nvidia/specialized_decode/cutedsl/dsa/attn_fi.py
_offsets(capacity, rows, device)
¶
The packed-query offsets of rows one-token rows in a plan of
capacity: [0, 1, ..., rows, ..., rows].
Source code in vllm/models/kimi_k3/nvidia/specialized_decode/cutedsl/dsa/attn_fi.py
dsa_on_flashinfer(attention)
¶
Whether a KimiK3DSAAttention runs FLASHINFER_MLA_SPARSE (per-tensor FP8 query; per-tensor FP8 or nvfp4_ds_mla cache).
Source code in vllm/models/kimi_k3/nvidia/specialized_decode/cutedsl/dsa/attn_fi.py
fi_kernels(kv_cache_dtype)
¶
The sparse MLA kernels the specialized decode picks from per batch (FI_KERNEL): trtllm-gen and prims_ts on a per-tensor FP8 cache, prims_ts alone on an nvfp4_ds_mla one (no trtllm-gen kernel reads it); under DCP on a per-tensor FP8 cache also the specialized sparse decode ("sparse", attn_sparse) at the batches attn_sparse.SPARSE_DCP gives it.
Source code in vllm/models/kimi_k3/nvidia/specialized_decode/cutedsl/dsa/attn_fi.py
kernel_for(rows, dcp, kernels, heads=None)
¶
The sparse MLA kernel of one batch: the measured choice among kernels
(heads: the query heads; trtllm-gen takes at most 64 or exactly 128, so
unpadded 64 < H < 128 run prims_ts). Without DCP, 128 heads are TP1's 96
head-padded (fi_heads): the stock decode's kernel, trtllm-gen on a per-tensor
FP8 cache (its split-KV schedule; GB300 128K q5, 5 / 20 / 80 / 160 / 320 rows:
17.7 / 26.0 / 51.0 / 73.1 / 113.6 us, prims_ts 21.2 / 27.4 / 50.7 / 72.4 /
112.6), prims_ts on nvfp4_ds_mla.
Source code in vllm/models/kimi_k3/nvidia/specialized_decode/cutedsl/dsa/attn_fi.py
plan_rows_for(rows, capacities=None)
¶
The rows of the prims_ts plan that runs a batch of rows: the smallest of
the stock decode's row capacities that holds it (None: its own).